In certain semiconductor applications it has become necessary to integrate dual gate oxide (DGO) thicknesses for associated transistor devices onto a single integrated circuit device. One motivation for performing dual gate oxide processing is that high performance transistors typically operate at lower voltages (e.g., 0.8 volts to 1.5 volts), and thus require thinner gate dielectric regions, whereas devices that interface with most conventional external peripherals typically require higher operating voltages (e.g., 1.8 volts to 3.5 volts), and thus require thicker gate dielectric regions. When interfacing lower voltage high performance metal-oxide-semiconductor field-effect-transistors (MOSFETs) within a core of an integrated circuit, to higher voltage peripheral devices, input and output (I/O) buffers of the integrated circuit (IC) are typically designed to contain thicker gate dielectric regions that are compatible with the higher external peripheral device voltages.
For example, current microcontroller units (MCUs) and digital signal processors (DSPs) are integrating several different types of technology onto a single integrated circuit, such as high speed logic, power logic, static random access memory (SRAM), nonvolatile memory (NVM), embedded dynamic random access memory (DRAM), analog circuitry, and other devices and technologies. Many of these devices require different gate dielectric processing and different gate dielectric thicknesses to provide both high performance lower voltage devices within the core of the device and higher voltage I/O devices to interface with external peripheral devices.
As stated above, a dual gate thickness structure includes thin gate dielectrics for high performance low voltage operation core devices, and thick gate dielectrics for low leakage high voltage operation I/O devices. As devices shrink, even the thick gate dielectrics are getting thinner to meet device requirements. This can cause increased leakage current for the devices, especially the high voltage devices having the thick gate dielectrics.
It has generally been accepted that the leakage current can be mitigated by introducing nitrogen atoms into the gate dielectrics to suppress leakage currents for both the thin and thick gates. One method of nitrogen atom introduction includes performing non-thermal nitridation (e.g., plasma nitridation) on the gate dielectrics. Unfortunately, this and other methods of introducing the nitrogen atoms into the gate dielectrics tend to provide a non-uniform nitrogen profile in the gate dielectric, which results in reduced reliability. The non-uniformity, and thus reduced reliability, is particularly significant in thicker gate dielectrics, such as those used in the aforementioned high voltage devices.
Turning to FIG. 1, depicted is a graph 100 illustrating the nitrogen profile 110 and oxygen profile 120 in a gate dielectric manufactured using one of the aforementioned nitrogen inclusion techniques. In observing the nitrogen profile 110 in the gate dielectric layer, those skilled in the art understand focus should be made on the bulk region of the dielectric layer, wherein the nitrogen profile is a true representation of the dielectric layer. Accordingly, the bulk region of the dielectric layer is generally defined to exclude, on the lower limit, the first 0.3 nm of the dielectric layer, represented by the line 130, and exclude, on the upper limit, anything past where the oxygen profile 120 decreases to about 90% of an average oxygen concentration within the bulk region, as represented by a line 140.
A non-uniformity (N.U.) of the nitrogen concentration in the bulk region may be defined to quantify differences between films. The definition applied in the context of the present invention is
                              %          ⁢                                          ⁢                      N            .            U            .                          =                                                                              [                  N                  ]                                max                            -                                                [                  N                  ]                                min                                                                    [                N                ]                            avg                                *          100                                    (        1        )            Using this equation, the non-uniformity of the nitrogen within the dielectric layer represented in the graph 100 is at least 135 percent if not 140 percent or more. As indicated above, this non-uniformity introduces reliability issues. The graph 100 thereby illustrates that conventional manufacturing techniques are generally unable to obtain nitrogen non-uniformity values in the bulk of the dielectric layers less than about 100 percent.
Accordingly, what is needed in the art is a method for including nitrogen within a dielectric layer that will result in improved non-uniformity values in the bulk region thereof.